Where is the theoretical limit of the chip?

Maybe you often hear a saying in the news that Moore's law is about to fail. What does this mean?Does it mean that the chip technology is about to reach the ceiling?

To figure out this problem, we must first understand where the theoretical limit of chip technology is.Because we believe that with technological progress, the difficulties in the project will be overcome sooner or later, but if it is not able to do it in physical principles, there is no way.In this article, let's take a look. Where is the theoretical limit of chip technology?

1. How to understand the theoretical limit of the chip?

Let's explain first, today we discuss the theory limit starts from the transistor.why?Because no matter how advanced the chip, how complicated the function can be achieved, it is restored to the essence. It is combined by a transistor.

The performance level of transistors has always represents the performance level of the chip.So, where is the performance of the transistor?

Let's recall the subway station model of the transistor first: a transistor is composed of two subway stations. There is a sometimes passage between the two subway stations.Electronics can flow over; when the passage disappears, the electrons will not pass when the channel disappears.

This channel is very important. In the transistor, it is called channels, and important performance indicators such as the speed of the transistor and the power consumption are closely related to the length of the channel.The 7 -nanometer and 5 nanometers you often hear in the news related to the chip are talking about the length of this channel.

The more advanced chips, the shorter the transistor's channel, the shorter the channel, the shorter the electrons pass through the channel, the faster the transmission of information, the better the performance of the chip.Moore's law has been advancing for the past few decades, and it is staring at this channel size.

In 1974, IBM's scientists proposed Dengnad's law, which is the technical approach to a narrow proportion.To say that compared to the previous generation technology, the length and width of the new process node device have become 0.7 times, so the area of the device becomes 0.49 times, which is equal to half, and the integration of the chip has doubled.

The reduction of the equal proportion was a relatively easy implementation plan in the early days, and it became the main driving force for the development of chips in the past decades. However, this solution seems to be too perfect. Can the ditbars be reduced infinitely?Unfortunately, of course not.

There is a theoretical limit of the channel length, that is, the diameter of a silicon atom is 0.2 nanometers.

why?Let's imagine that if the channel continues to shrink until it is shorter than the diameter of the atom, it means that the two subway stations are completely connected together, and there will be no more disconnects, and the transistor is naturally invalid without the switching function of the transistor.

So in theory, no matter how much technology improves, as long as it is a crystal tube of silicon semiconductor material, the channel cannot be shorter than 0.2 nanometer.

2. Where is the theoretical limit of the transistor?

Now the more advanced technology of mass production is 5nm. You may think that there are 25 times the distance from 0.2 nanometers. We are quite far from the limit. Why are we anxious to discuss the problem of Moore's law end?

Don't be too happy,Before the length of the channel is reduced to 0.2 nanometers, there is another series of restrictions. Here I will introduce you to the level of two physical law levels: one is thermodynamic restrictions and the other is quantum mechanics limit.

Let's talk about thermodynamic restrictions. In short, the effect of chip work temperature is simply.

The silicon atoms are relatively large, just like an adult, the electrons are relatively small, just like a kindergarten child. When the crystal tube is working, the electron flows through the channel, as if the child wants to wear it from one end of this adult array to the other end.

In the early days, 800 nanometers and 600 nanometers, such as large -sized transistors, have a large transmission current, and there are many circulating electrons, so it is not easy to make mistakes.This is equivalent to many many children running together, and it doesn't matter if you hit it. After all, there is a certain proportion of running.

However, when the length of the channel is continuously shortened, there are only hundreds or even dozens of electronics each time, and a little noise caused by the work temperature of the chip may make the chip error.Therefore, the working temperature of the chip sets a thermodynamic limit for the crystal size. There is such a threshold. This threshold is related to the working temperature.

Another restriction is quantum mechanics restrictions.

When the channel is reduced to a short time, the quantum effect begins to appear. Now 7 -nanometer and 5 nanometer devices must consider the effects of quantum mechanics.

What is the quantum mechanics limit?That is, the uncertainty brought by the quantum tunnel through, in the crystal tube of the nano -scale, if the distance between the two subway stations is very small, even if the transistor is closed, there is no channel between the two subway stations, and the electrons may also be possible.The tunnel passes is like wearing wall techniques.

Moreover, the closer the distance between the two subway stations, the greater the possibility of passing through. To a certain extent, there is almost no difference between the channels.

Summary here, although the theoretical crystal limit is a silicon atomic diameter, the threshold of thermodynamic limit and quantum mechanics limit is larger than this diameter, that is, the channel has not narrowed to 0.2 nanometer, the ultimate limit.Thermodynamics and quantum mechanics limit has been stuck in the device size.

Studies have shown that the limit size of the silicon transistor is about 1 nanometer, which is the theoretical limit of a single transistor device.

Please note that I am talking about the theoretical limit of 1 nanometer is the theoretical limit of a single device. If it is truly mass -produced, there will be many engineering technical difficulties.The more advanced technology of mass production is the 5 -nanocrystone tube of TSMC. After two or three years, it is very hoped that the mass production of 3 nanometers will be achieved.But afterwards, whether it can produce 2 nanometer or even 1 nanometer crystal tube, it is not too optimistic now.

3. Integration will bring more restrictions

For example, integrated density, clock frequency, power supply voltage, number of wiring layers, etc. Each parameter limits the overall performance of the chip.These are too professional, I will not introduce them one by one.

However, a system restricts the development trend of your understanding of chip technology. Here you must introduce you clearly, that is, power consumption.

You may think that power consumption is a problem?Isn't it justified?It's not that simple. If the power consumption of the chip is too great, that is to say, the calories are too fast, and the heat will not be dispersed in time, the heat will gather, and the working temperature of the chip will rise sharply, the chip will become increasingly increasingThe slower, even the failure.This is why the computer's fan is broken, it will be a blue -screen death machine.

I write this manuscript computer in the computer is an Intel I7 processor, and its power density is about 50 W/CM².You may have no concept of this number. I tell you that the power density of the home electric iron is only 5 W/CM², which is 10 times smaller than my processor chip.Do you dare to touch the electric iron?It will definitely be burned, but the chip is 10 times more hot than an electric iron.

This is also the PC's processor chip. The power density of professional chips in some fields is high or even 380 W/CM². You know, the Rockets nozzle is just 600 W/CM².

Therefore, the current chip must be equipped with a very reliable heat dissipation system when using it. Generally, a fan is used to heat the heat, and even a stronger CPU chip must have a higher -level water -cooled system to maintain normal work. Otherwise, you cannot run at all.Essence

For large -scale server rooms, the electricity consumption of air conditioning refrigeration has even exceeded the power consumption of the computer itself.Low power consumption in mobile phone chips is a core technical requirement, so mobile chips must be made with advanced process nodes in order to ensure high performance and low power consumption.

Therefore, power consumption is a severe problem that all chips must face.

4. This summary

To sum up this lecture, we discussed the limits of chip performance. The key is to look at the channel size of the transistor.

In theory, looking at a single device alone, this limit size is 1 nanometer.However, when hundreds of billion or tens of billions of crystal pipes are integrated, there are also heat, connecting, and so on. More restricted factors need to be considered.

Does this tell us that Moore's law is indeed invalidated, and the development of chip technology is immediately to the ceiling?of course not.Have you noticed that the limits we just discussed actually had a major premise, that is, silicon crystal chip, what does this mean?You are welcome to share your point of view in the comment area.

In the next article, I will tell you why the limits of chip technology are far from coming, and we believe that the chip industry will continue to prosper for 100 years, the next article.

Focus on:

1 The performance level of the transistor almost represents the performance level of the chip, but it will also receive thermodynamic restrictions and quantum mechanics restrictions.

2 Just look at a single device. The limit size of the chip transistor is 1 nanometer.

3 billion and tens of billions of crystal pipes are integrated to one piece, and more restricted factors such as fever and connection should also be considered.